Impact of Systematic Spatial Intra-Chip Gate Length Variability on Performance of High-Speed Digital Circuits

Michael Orshansky, Linda Milor, Pinhong Chen, Kurt Keutzer, Chenming Hu. Impact of Systematic Spatial Intra-Chip Gate Length Variability on Performance of High-Speed Digital Circuits. In Ellen Sentovich, editor, Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000, San Jose, California, USA, November 5-9, 2000. pages 62-67, IEEE, 2000.

@inproceedings{OrshanskyMCKH00,
  title = {Impact of Systematic Spatial Intra-Chip Gate Length Variability on Performance of High-Speed Digital Circuits},
  author = {Michael Orshansky and Linda Milor and Pinhong Chen and Kurt Keutzer and Chenming Hu},
  year = {2000},
  tags = {systematic-approach},
  researchr = {https://researchr.org/publication/OrshanskyMCKH00},
  cites = {0},
  citedby = {0},
  pages = {62-67},
  booktitle = {Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000, San Jose, California, USA, November 5-9, 2000},
  editor = {Ellen Sentovich},
  publisher = {IEEE},
  isbn = {0-7803-6448-1},
}