Layout, Performance and Power Trade-Offs in Mesh-Based Network-on-Chip Architectures - researchr publication authors

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Dinesh Pamunuwa, Johnny Öberg, Li-Rong Zheng, Mikael Millberg, Axel Jantsch. Layout, Performance and Power Trade-Offs in Mesh-Based Network-on-Chip Architectures. In Manfred Glesner, Ricardo Augusto da Luz Reis, Hans Eveking, Vincent John Mooney III, Leandro Soares Indrusiak, Peter Zipf, editors, IFIP VLSI-SoC 2003, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Darmstadt, Germany, 1-3 December 2003. pages 362, Technische Universität Darmstadt, Insitute of Microelectronic Systems, 2003.

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