Optimal clock period FPGA technology mapping for sequential circuits

Peichen Pan, C. L. Liu. Optimal clock period FPGA technology mapping for sequential circuits. ACM Trans. Design Autom. Electr. Syst., 3(3):437-462, 1998. [doi]

@article{PanL98,
  title = {Optimal clock period FPGA technology mapping for sequential circuits},
  author = {Peichen Pan and C. L. Liu},
  year = {1998},
  doi = {10.1145/293625.293632},
  url = {http://doi.acm.org/10.1145/293625.293632},
  tags = {C++},
  researchr = {https://researchr.org/publication/PanL98},
  cites = {0},
  citedby = {0},
  journal = {ACM Trans. Design Autom. Electr. Syst.},
  volume = {3},
  number = {3},
  pages = {437-462},
}