Harnessing voltage margins for energy efficiency in multicore CPUs

George Papadimitriou, Manolis Kaliorakis, Athanasios Chatzidimitriou, Dimitris Gizopoulos, Peter Lawthers, Shidhartha Das. Harnessing voltage margins for energy efficiency in multicore CPUs. In Hillery C. Hunter, Jaime Moreno, Joel S. Emer, Daniel Sánchez 0003, editors, Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2017, Cambridge, MA, USA, October 14-18, 2017. pages 503-516, ACM, 2017. [doi]

@inproceedings{PapadimitriouKC17-0,
  title = {Harnessing voltage margins for energy efficiency in multicore CPUs},
  author = {George Papadimitriou and Manolis Kaliorakis and Athanasios Chatzidimitriou and Dimitris Gizopoulos and Peter Lawthers and Shidhartha Das},
  year = {2017},
  doi = {10.1145/3123939.3124537},
  url = {http://doi.acm.org/10.1145/3123939.3124537},
  researchr = {https://researchr.org/publication/PapadimitriouKC17-0},
  cites = {0},
  citedby = {0},
  pages = {503-516},
  booktitle = {Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2017, Cambridge, MA, USA, October 14-18, 2017},
  editor = {Hillery C. Hunter and Jaime Moreno and Joel S. Emer and Daniel Sánchez 0003},
  publisher = {ACM},
  isbn = {978-1-4503-4952-9},
}