A Semi-Digital Delay Locked Loop for Clock Skew Minimization

Joonbae Park, Yido Koo, Wonchan Kim. A Semi-Digital Delay Locked Loop for Clock Skew Minimization. In 12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India. pages 584-588, IEEE Computer Society, 1999. [doi]

@inproceedings{ParkKK99:0,
  title = {A Semi-Digital Delay Locked Loop for Clock Skew Minimization},
  author = {Joonbae Park and Yido Koo and Wonchan Kim},
  year = {1999},
  doi = {10.1109/ICVD.1999.745218},
  url = {http://doi.ieeecomputersociety.org/10.1109/ICVD.1999.745218},
  researchr = {https://researchr.org/publication/ParkKK99%3A0},
  cites = {0},
  citedby = {0},
  pages = {584-588},
  booktitle = {12th International Conference on VLSI Design (VLSI Design 1999), 10-13 January 1999, Goa, India},
  publisher = {IEEE Computer Society},
}