Low-power all-digital ΔΣ TDC with bi-directional gated delay line time integrator

Young-Jun Park, Fei Yuan. Low-power all-digital ΔΣ TDC with bi-directional gated delay line time integrator. In IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017, Boston, MA, USA, August 6-9, 2017. pages 679-682, IEEE, 2017. [doi]

Abstract

Abstract is missing.