Pole-Aware Analog Layout Synthesis Considering Monotonic Current Flows and Wire Crossings - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Abhishek Patyal, Hung-Ming Chen, Mark Po-Hung Lin, Guan-Qi Fang, Simon Yi-Hung Chen. Pole-Aware Analog Layout Synthesis Considering Monotonic Current Flows and Wire Crossings. IEEE Trans. on CAD of Integrated Circuits and Systems, 42(1):266-279, 2023. [doi]

This author has not been identified. Look up 'Abhishek Patyal' in GoogleThis author has not been identified. Look up 'Hung-Ming Chen' in GoogleThis author has not been identified. Look up 'Mark Po-Hung Lin' in GoogleThis author has not been identified. Look up 'Guan-Qi Fang' in GoogleThis author has not been identified. Look up 'Simon Yi-Hung Chen' in Google

runs on WebDSL