Technology/Memory Co-Design and Co-Optimization Using E-Tree Interconnect - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Zhenlin Pei, Mahta Mayahinia, Hsiao-Hsuan Liu, Mehdi B. Tahoori, Francky Catthoor, Zsolt Tokei, Chenyun Pan. Technology/Memory Co-Design and Co-Optimization Using E-Tree Interconnect. In Himanshu Thapliyal, Ronald F. DeMara, Inna Partin-Vaisband, Srinivas Katkoori, editors, Proceedings of the Great Lakes Symposium on VLSI 2023, GLSVLSI 2023, Knoxville, TN, USA, June 5-7, 2023. pages 159-162, ACM, 2023. [doi]

This author has not been identified. Look up 'Zhenlin Pei' in GoogleThis author has not been identified. Look up 'Mahta Mayahinia' in GoogleThis author has not been identified. Look up 'Hsiao-Hsuan Liu' in GoogleThis author has not been identified. Look up 'Mehdi B. Tahoori' in GoogleThis author has not been identified. It may be one of the following persons:

Francky Catthoor

Look up 'Francky Catthoor' in GoogleThis author has not been identified. Look up 'Zsolt Tokei' in GoogleThis author has not been identified. Look up 'Chenyun Pan' in Google

runs on WebDSL