Table of Contents

• Smart HealthcareNiraj K. Jha. 1 [doi]
• IMA-GNN: In-Memory Acceleration of Centralized and Decentralized Graph Neural Networks at the EdgeMehrdad Morsali, Mahmoud Nazzal, Abdallah Khreishah, Shaahin Angizi. 3-8 [doi]
• Low-Cost Multiple-Precision Multiplication Unit Design For Deep LearningJing Zhang, Libo Huang, Hongbing Tan, Ling Yang, Zhong Zheng, Qianming Yang. 9-14 [doi]
• TRON: Transformer Neural Network Acceleration with Non-Coherent Silicon PhotonicsSalma Afifi, Febin Sunny, Mahdi Nikdast, Sudeep Pasricha. 15-21 [doi]
• PEPA: Performance Enhancement of Embedded Processors through HW Accelerator Resource SharingQilin Si, Benjamin Carrión Schäfer. 23-28 [doi]
• Optimize the TX Architecture of RDMA NIC for Performance Isolation in the Cloud EnvironmentYunkun Liao, Jingya Wu, Wenyan Lu, Xiaowei Li 0001, Guihai Yan. 29-35 [doi]
• KPU-SQL: Kernel Processing Unit for High-Performance SQL AccelerationHao Kong, Haishuang Fan, Jingya Wu, Liyun Cheng, Yan Chen, Wenyan Lu, Guihai Yan, Xiaowei Li. 37-43 [doi]
• SCRAMBLE-CFI: Mitigating Fault-Induced Control-Flow Attacks on OpenTitanPascal Nasahl, Stefan Mangard. 45-50 [doi]
• HT-EMIS: A Deep Learning Tool for Hardware Trojan Detection and Identification through Runtime EM Side-ChannelsHanqiu Wang, Maximillian Kealoha Panoff, Shuo Wang, Domenic Forte. 51-56 [doi]
• Exploring Remote Power Attacks Targeting Parallel Data Encryption On Multi-Tenant FPGAsYankun Zhu, Jindong Zhou, Pingqiang Zhou. 57-62 [doi]
• Stochastically Pruning Large Language Models Using Sparsity Regularization and Compressive SensingMohammad Munzurul Islam, Mohammed Alawad. 63-68 [doi]
• M2VT: A Multi-Output Encoder Accelerator for Multiple-Way Video TranscodingHaishuang Fan, Jingya Wu, Wenyan Lu, Xiaowei Li 0001, Guihai Yan. 69-75 [doi]
• TPNoC: An Efficient Topology Reconfigurable NoC GeneratorJiangnan Yu, Fan Yang 0001, Xiaoling Yi, Chixiao Chen, Jun Tao 0001, Dong Xu, Xiankui Xiong, Haitao Yang. 77-82 [doi]
• Closing the Gap between Quantum Algorithms and Machines with Hardware-Software Co-DesignFred Chong. 83-84 [doi]
• Towards Self-Supervised Learning of ECG Signal Representation for the Classification of Acute Stress TypesRajdeep K. Nath, Jaakko Tervonen, Johanna Närväinen, Kati Pettersson, Jani Mäntyjärvi. 85-90 [doi]
• OTFT Based Biosensor for Detection of Breast Cancer Biomarker (C-erbB-2)Sushil Kumar Jain, Amit Mahesh Joshi. 91-96 [doi]
• hChain: Blockchain Based Healthcare Data Sharing with Enhanced Security and Privacy Location-Based-AuthenticationMusharraf N. Alruwaill, Saraju P. Mohanty, Elias Kougianos. 97-102 [doi]
• CASD-OA: Context-Aware Stress Detection for Older Adults with Machine Learning and Cortisol BiomarkerMd. Saif Hassan Onim, Himanshu Thapliyal. 103-108 [doi]
• Search Space Reduction for Efficient Quantum CompilationAmisha Srivastava, Chao Lu, Navnil Choudhury, Ayush Arunachalam, Kanad Basu. 109-114 [doi]
• Scalable Hybrid CMOS-Diamond Quantum MagnetometersMohamed I. Ibrahim. 115-116 [doi]
• Fingerprinting Quantum Computer EquipmentJalil Morris, Anisul Abedin, Chuanqi Xu, Jakub Szefer. 117-123 [doi]
• A Logarithmic Depth Quantum Carry-Lookahead Modulo (2n - 1) AdderBhaskar Gaur, Edgard Muñoz-Coreas, Himanshu Thapliyal. 125-130 [doi]
• Reliability Analysis of Memristive Reservoir Computing ArchitectureManu Rathore, Rocco D. Febbo, Adam Z. Foshie, Sree Nirmillo Biswash Tushar, Hritom Das, Garrett S. Rose. 131-136 [doi]
• Hardware Accelerators for Spiking Neural Networks for Energy-Efficient Edge ComputingAbhishek Moitra, Ruokai Yin, Priyadarshini Panda. 137-138 [doi]
• A Brain-inspired Approach for Malware Detection using Sub-semantic Hardware FeaturesMaryam Parsa, Khaled N. Khasawneh, Ihsen Alouani. 139-142 [doi]
• A Cryogenic Artificial Synapse based on Superconducting MemristorMd Mazharul Islam, Shamiul Alam, Md Rahatul Islam Udoy, Md. Shafayat Hossain, Ahmedullah Aziz. 143-148 [doi]
• A Context-Switching/Dual-Context ROM Augmented RAM using Standard 8T SRAMMd. Abdullah-Al Kaiser, Edwin Tieu, Ajey P. Jacob, Akhilesh R. Jaiswal. 149-153 [doi]
• MCSim: A Multi-Core Cache Simulator Accelerated on a Resource-constrained FPGAShivani Shah, Nanditha P. Rao. 155-158 [doi]
• Technology/Memory Co-Design and Co-Optimization Using E-Tree InterconnectZhenlin Pei, Mahta Mayahinia, Hsiao-Hsuan Liu, Mehdi B. Tahoori, Francky Catthoor, Zsolt Tokei, Chenyun Pan. 159-162 [doi]
• Design and Evaluation of Finite Field Multipliers Using Fast XNOR CellsNitin D. Patwari, Anjul Srivastav, Mayank Kabra, Prashanth Jonna, Madhav Rao. 163-166 [doi]
• A Low Area and Low Delay Latch Design with Complete Double-Node-Upset-Recovery for Aerospace ApplicationsAibin Yan, Shaojie Wei, Jinjun Zhang, Jie Cui 0004, Jie Song, Tianming Ni, Patrick Girard 0001, Xiaoqing Wen. 167-171 [doi]
• RBGC: Repurpose the Buffer of Fixed Graphics Pipeline to Enhance GPU CacheHaoyu Zhao, Longbing Zhang, Fuxin Zhang. 173-177 [doi]
• A Mixed-Signal Short-Term Plasticity Implementation for a Current-Controlled Memristive SynapseNishith N. Chakraborty, Hritom Das, Garrett S. Rose. 179-182 [doi]
• XMG-GPPIC: Efficient and Robust General-Purpose Processing-in-Cache with XOR-Majority-GraphChen Nie, Xianjue Cai, Chenyang Lv, Chen Huang, Weikang Qian, Zhezhi He. 183-187 [doi]
• SRAM-Based Processing-In-Memory Design with Kullback-Leibler Divergence-Based Dynamic Precision QuantizationYanjun Li, Chunshan Zu, Bingqian Wang, Zhenhua Zhu, Yaojun Zhang, Ran Duan, Bing Li, Bonan Yan. 189-192 [doi]
• Inter-Layer Hybrid Quantization Scheme for Hardware Friendly Implementation of Embedded Deep Neural NetworksNajmeh Nazari, Mostafa E. Salehi. 193-196 [doi]
• RL-Ripper: : A Framework for Global Routing Using Reinforcement Learning and Smart Net Ripping TechniquesUpma Gandhi, Erfan Aghaeekiasaraee, Ismail S. K. Bustany, Payam Mousavi, Matthew E. Taylor, Laleh Behjat. 197-201 [doi]
• A Runtime-Reconfigurable Hardware Encoder for Spiking Neural NetworksSk Hasibul Alam, Adam Z. Foshie, Garrett S. Rose. 203-206 [doi]
• FlutPIM: : A Look-up Table-based Processing in Memory Architecture with Floating-point Computation Support for Deep Learning ApplicationsPurab Ranjan Sutradhar, Sathwika Bavikadi, Mark Indovina, Sai Manoj Pudukotai Dinakarrao, Amlan Ganguly. 207-211 [doi]
• Statistical Weight Refresh System for CTT-Based Synaptic ArraysSamuel Dayo, Ataollah Saeed Monir, Mousa Karimi, Boris Vaisband. 213-214 [doi]
• Lightweight Hierarchical Root-of-Trust Framework for CAN-based 3D Printing SecurityTyler Cultice, Joseph Clark, Himanshu Thapliyal. 215-216 [doi]
• On Feasibility of Decision Trees for Edge Intelligence in Highly Constrained Internet-of-Things (IoT)Raaga Sai Somesula, Rajeev Joshi, Srinivas Katkoori. 217-218 [doi]
• A Scalable BFloat16 Dot-Product Architecture for Deep LearningJing Zhang, Libo Huang, Hongbing Tan, Zhong Zheng, Hui Guo. 219-220 [doi]
• Confidence Counter Modelling for Value PredictorLing Yang, Libo Huang, Zhong Zheng. 221-222 [doi]
• Unaligned Access Optimization with Request-based Mapping Scheme for Solid-state DrivesMinjun Li. 223-224 [doi]
• Reconvergent Path-aware Simulation of Bit-stream ProcessingSercan Aygun, M. Hassan Najafi, Mohsen Imani, Ece Olcay Günes. 225-226 [doi]
• Radiation Hardened and Leakage Power Attack Resilient 12T SRAM Cell for Secure Nuclear EnvironmentsDebabrata Mondal, Syed Farah Naz, Ambika Prasad Shah. 227-228 [doi]
• Microelectronics Security in CHIPS EraMark M. Tehranipoor. 229 [doi]
• PUFchain 4.0: Integrating PUF-based TPM in Distributed Ledger for Security-by-Design of IoTVenkata K. V. V. Bathalapalli, Saraju P. Mohanty, Elias Kougianos, Vasanth Iyer, Bibhudutta Rout. 231-236 [doi]
• Precision and Performance-Aware Voltage Scaling in DNN AcceleratorsMallika Rathore, Peter A. Milder, Emre Salman. 237-242 [doi]
• Facial Expression Recognition at the Edge: CPU vs GPU vs VPU vs TPUMohammadreza Mohammadi, Heath Smith, Lareb Khan, Ramtin Zand. 243-248 [doi]
• Fortified-Edge: Secure PUF Certificate Authentication Mechanism for Edge Data Centers in Collaborative Edge ComputingSeema G. Aarella, Saraju P. Mohanty, Elias Kougianos, Deepak Puthal. 249-254 [doi]
• SOAER: Self-Obstacle Avoiding Escape Routing for Paper-Based Digital Microfluidic BiochipsWeiqing Ji, Xingcheng Yao, Hailong Yao, Tsung-Yi Ho, Ulf Schlichtmann, Xia Yin. 255-260 [doi]
• Reconfigurable Mapping Algorithm based Stuck-At-Fault Mitigation in Neuromorphic Computing SystemsMd. Oli-Uz-Zaman, Saleh Ahmad Khan, William Oswald, Zhiheng Liao, Jinhui Wang. 261-266 [doi]
• Digital LIF Neuron for CTT-Based Neuromorphic SystemsOkyanus T. Gumus, Mousa Karimi, Boris Vaisband. 267-272 [doi]
• Bit-Stream Processing with No Bit-Stream: Efficient Software Simulation of Stochastic Vision MachinesSercan Aygun, M. Hassan Najafi, Mohsen Imani, Ece Olcay Günes. 273-279 [doi]
• RFAM: RESET-Failure-Aware-Model for HfO2-based Memristor to Enhance the Reliability of Neuromorphic DesignHritom Das, Manu Rathore, Rocco Febbo, Maximilian Liehr, Nathaniel C. Cady, Garrett S. Rose. 281-286 [doi]
• SiFI-AI: A Fast and Flexible RTL Fault Simulation Framework Tailored for AI Models and AcceleratorsJulian Höfer, Fabian Kempf, Tim Hotfilter, Fabian Kreß, Tanja Harbaum, Jürgen Becker 0001. 287-292 [doi]
• Two Highly Reliable and High-Speed SRAM Cells for Safety-Critical ApplicationsAibin Yan, Yang Chang, Jing Xiang, Hao Luo, Jie Cui, Zhengfeng Huang, Tianming Ni, Xiaoqing Wen. 293-298 [doi]
• FPGNN-ATPG: An Efficient Fault Parallel Automatic Test Pattern GeneratorYuyang Ye, Zonghui Wang, Zun Xue, Ziqi Wang, Yifei Gao, Hao Yan. 299-304 [doi]
• More Efficient Accuracy-Ensured Waveform Compression for Circuit Simulation Supporting Asynchronous WaveformsLingjie Li, Wenjian Yu, Genhua Guo, Zhenya Zhou. 305-311 [doi]
• DRC Violation Prediction with Pre-global-routing Features Through Convolutional Neural NetworkJhen-Gang Lin, Yu-Guang Chen, Yun-Wei Yang, Wei-Tse Hung, Cheng-Hong Tsai, De-Shiun Fu, Mango Chia-Tso Chao. 313-319 [doi]
• Placement Legalization Amenable to Mixed-cell-height Standard Cells Integrating into State-of-the-art Commercial EDA ToolHwapyong Kim, Taewhan Kim. 321-326 [doi]
• ADVICE: Automatic Design and Optimization of Behavioral Application Specific ProcessorsQilin Si, Benjamin Carrión Schäfer. 327-332 [doi]
• Island-based Random Dynamic Voltage Scaling vs ML-Enhanced Power Side-Channel AttacksDake Chen, Christine Goins, Maxwell Waugaman, Georgios D. Dimou, Peter A. Beerel. 333-338 [doi]
• CoLA: Convolutional Neural Network Model for Secure Low Overhead Logic Locking AssignmentYeganeh Aghamohammadi, Amin Rezaei. 339-344 [doi]
• Enhancing Solver-based Generic Side-Channel Analysis with Machine LearningKaveh Shamsi, Guangwei Zhao. 345-350 [doi]
• Exploiting Logic Locking for a Neural Trojan Attack on Machine Learning AcceleratorsHongye Xu, Dongfang Liu, Cory E. Merkel, Michael Zuzak. 351-356 [doi]
• CPP: A Multi-Level Circuit Partitioning Predictor for Hardware Verification SystemsXinshi Zang, Lei Chen, Xing Li, Wilson W.-K. Thong, Weihua Sheng, Evangeline F. Y. Young, Martin D. F. Wong. 357-361 [doi]
• Hybrid-Row-Height Design Placement Legalization Considering Cell VariantsSyuan-Han Liang, Tsu-Ling Hsiung, Wai-Kei Mak, Ting-Chi Wang. 363-367 [doi]
• An Efficient and Robust Algorithm for Common Path Pessimism Removal In Static Timing AnalysisMengshi Gong, Jie Ma, Wenxin Yu. 369-372 [doi]
• Efficient and Effective Digital Waveform Compression for Large-scale Logic Simulation of Integrated CircuitZhenyi Gao, Yuyang Xie, Wenjian Yu. 373-377 [doi]
• A High-accurate Multi-objective Ensemble Exploration Framework for Design Space of CPU MicroarchitectureDuo Wang, Mingyu Yan, Yihan Teng, Dengke Han, Xiaochun Ye, Dongrui Fan. 379-383 [doi]
• DrPIM: An Adaptive and Less-blocking Data Replication Framework for Processing-in-Memory ArchitectureSheng Xu, Hongyu Xue, Le Luo, Liang Yan, Xingqi Zou. 385-389 [doi]
• A Macro Legalization Approach Considering Minimum Channel Spacing and Buffer Area Reservation ConstraintsChun-Wei Chiu, Yun-Kai Fang, Shao-Ting Chung, Ting-Chi Wang. 391-395 [doi]
• Stochastic Computing for Reliable Memristive In-Memory ComputationMohsen Riahi Alam, M. Hassan Najafi, Nima Taherinejad, Mohsen Imani, Lu Peng. 397-401 [doi]
• High-Density FeFET-based CAM Cell Design Via Multi-Dimensional EncodingHadi Noureddine, Omar Bekdache, Mohamad Al Tawil, Rouwaida Kanj, Ali Chehab, Mohammed E. Fouda, Ahmed M. Eltawil. 403-407 [doi]
• Locate: Low-Power Viterbi Decoder Exploration using Approximate AddersRajat Bhattacharjya, Biswadip Maity, Nikil D. Dutt. 409-413 [doi]
• Graph Neural Network Assisted Quantum Compilation for Qubit AllocationTravis LeCompte, Fang Qi, Xu Yuan, Nian-Feng Tzeng, M. Hassan Najafi, Lu Peng 0001. 415-419 [doi]
• Compound Logic Gates for Pipeline Depth Minimization in Single Flux Quantum Integrated SystemsRassul Bairamkulov, Giovanni De Micheli. 421-425 [doi]
• Noise-Resilient and Reduced Depth Approximate Adders for NISQ Quantum ComputingBhaskar Gaur, Travis S. Humble, Himanshu Thapliyal. 427-431 [doi]
• SVP: Safe and Efficient Speculative Execution Mechanism through Value PredictionKaixuan Wang, Xinyu Qin, Zhuoyuan Yang, Weiliang He, Yifan Liu, Jun Han 0003. 433-437 [doi]
• Dynamic Gold Code-Based Chaotic Clock for Cryptographic Designs to Counter Power Analysis AttacksThai-Ha Tran, Anh-Tien Le, Trong-Thuc Hoang, Van-Phuc Hoang, Cong-Kha Pham. 439-442 [doi]
• RAGA: Resource-Aware Tree-Splitting for High Performance Knuth-Yao-based Discrete Gaussian Sampling on FPGAsZachary J. Ellis, Anupam Golder, Addison J. Elliott, Arijit Raychowdhury. 443-447 [doi]
• Efficient Off-Policy Reinforcement Learning via Brain-Inspired ComputingYang Ni, Danny Abraham, Mariam Issa, Yeseong Kim, Pietro Mercati, Mohsen Imani. 449-453 [doi]
• High-Throughput Edge Inference for BERT Models via Neural Architecture Search and PipelineHung-Yang Chang, Seyyed Hasan Mozafari, James J. Clark, Brett H. Meyer, Warren J. Gross. 455-459 [doi]
• Enhancing the Security of Collaborative Deep Neural Networks: An Examination of the Effect of Low Pass FiltersAdewale Adeyemo, Syed Rafay Hasan. 461-465 [doi]
• Design Space Exploration of Layer-Wise Mixed-Precision Quantization with Tightly Integrated Edge Inference UnitsXiaotian Zhao, Yimin Gao, Vaibhav Verma, Ruge Xu, Mircea Stan, Xinfei Guo. 467-471 [doi]
• EBASA: Error Balanced Approximate Systolic Array Architecture DesignSai Karthik Nandigama, Bindu G. Gowda, Prashanth H. C., Madhav Rao. 473-476 [doi]
• Verilog-A Implementation of Generic Defect Templates for Analog Fault InjectionNicola Dall'Ora, Sadia Azam, Enrico Fraccaroli, Renaud Gillon, Franco Fummi. 477-481 [doi]
• GAT-based Concentration Prediction for Random Microfluidic Mixers with Multiple Input Flow RatesWeiqing Ji, Hailong Yao, Tsung-Yi Ho, Ulf Schlichtmann, Xia Yin. 483-488 [doi]
• Exploring Architecture, Dataflow, and Sparsity for GCN Accelerators: A Holistic FrameworkLingxiang Yin, Jun Wang, Hao Zheng. 489-495 [doi]
• SenTer: A Reconfigurable Processing-in-Sensor Architecture Enabling Efficient Ternary MLPSepehr Tabrizchi, Rebati Gaire, Shaahin Angizi, Arman Roohi. 497-502 [doi]
• IMAC: : A Pre-Multiplier And Integrated Reduction Based Multiply-And-Accumulate UnitBindu G. Gowda, Prashanth H. C., Madhav Rao. 503-508 [doi]
• Reinforcement Learning based Module Placement for Enhancing Reliability of MEDA Digital Microfluidic BiochipsDebraj Kundu, Gadikoyila Satya Vamsi, Karnati Vivek Veman, Gurram Mahidhar, Sudip Roy 0001. 509-514 [doi]
• JRouter: A Multi-Terminal Hierarchical Length-Matching Router under Planar Manhattan Routing Model for RSFQ CircuitsXinda Chen, Rongliang Fu, Junying Huang, Huawei Cao, Zhimin Zhang, Xiaochun Ye, Tsung-Yi Ho, Dongrui Fan. 515-520 [doi]
• Ternary In-Memory Computing with Cryogenic Quantum Anomalous Hall Effect MemoriesArun Govindankutty, Shamiul Alam, Sanjay Das, Nagadastagiri Challapalle, Ahmedullah Aziz, Sumitha George. 521-526 [doi]
• ATC: Approximate Temporal Coding for Efficient Implementations of Spiking Neural NetworksMing Han, Ye Wang, Jian Dong, Heng Liu, Jin Wu, Gang Qu 0001. 527-532 [doi]
• Design Space Exploration for PCM-based Photonic MemoryAmin Shafiee, Benoît Charbonnier, Sudeep Pasricha, Mahdi Nikdast. 533-538 [doi]
• Cross-Layer Design for AI Acceleration with Non-Coherent Optical ComputingFebin Sunny, Mahdi Nikdast, Sudeep Pasricha. 539-544 [doi]
• High-Speed and Energy-Efficient Non-Binary Computing with Polymorphic Electro-Optic Circuits and ArchitecturesIshan G. Thakkar, Sairam Sri Vatsavai, Venkata Sai Praneeth Karempudi. 545-550 [doi]
• Multi-Transverse-Mode Silicon Photonics for Quantum ComputingKaveh (Hassan) Rahbardar Mojaver, Odile Liboiron-Ladouceur. 551-556 [doi]
• Fault Recovery from Multi-Tenant FPGA Voltage AttacksShayan Moini, Dhruv Kansagara, Daniel E. Holcomb, Russell Tessier. 557-562 [doi]
• MAYAVI: A Cyber-Deception Hardware for Memory Load-StoresPreet Derasari, Kailash Gogineni, Guru Venkataramani. 563-568 [doi]
• On-Demand Device Authentication using Zero-Knowledge Proofs for Smart SystemsYadi Zhong, Joshua Hovanes, Ujjwal Guin. 569-574 [doi]
• TimingCamouflage+ DecamouflagedPriya Mittu, Yuntao Liu 0001, Ankur Srivastava 0001. 575-580 [doi]
• ESFO: Equality Saturation for FIRRTL OptimizationYan Pi, Hongji Zou, Tun Li, WanXia Qu, Hai Wan. 581-586 [doi]
• TDAG: Tree-based Directed Acyclic Graph Partitioning for Quantum CircuitsJoseph Clark, Travis S. Humble, Himanshu Thapliyal. 587-592 [doi]
• SPARK: A Scalable Partitioning and Routing Framework for Multi-FPGA SystemsXinshi Zang, Evangeline F. Y. Young, Martin D. F. Wong. 593-598 [doi]
• GUI-VP Kit: A RISC-V VP Meets Linux Graphics - Enabling Interactive Graphical Application DevelopmentManfred Schlägl, Daniel Große. 599-605 [doi]
• Heterogeneous Integration of In-Memory Analog Computing Architectures with Tensor Processing UnitsMohammed E. Elbtity, Brendan Reidy, Md Hasibul Amin, Ramtin Zand. 607-612 [doi]
• Technology-Circuit-Algorithm Tri-Design for Processing-in-Pixel-in-Memory (P2M)Md. Abdullah-Al Kaiser, Gourav Datta, Sreetama Sarkar, Souvik Kundu 0002, Zihan Yin, Manas Garg, Ajey P. Jacob, Peter A. Beerel, Akhilesh R. Jaiswal. 613-618 [doi]
• Examining the Role and Limits of Batchnorm Optimization to Mitigate Diverse Hardware-noise in In-memory ComputingAbhiroop Bhattacharjee, Abhishek Moitra, Youngeun Kim, Yeshwanth Venkatesha, Priyadarshini Panda. 619-624 [doi]
• Accelerating Low Bit-width Neural Networks at the Edge, PIM or FPGA: A Comparative StudyNakul Kochar, Lucas Ekiert, Deniz Najafi, Deliang Fan, Shaahin Angizi. 625-630 [doi]
• A Scalable Platform for Single-Snapshot Direction Of Arrival (DOA) Estimation in Massive MIMO SystemsAdou Sangbone Assoa, Ashwin Bhat, Sigang Ryu, Arijit Raychowdhury. 631-637 [doi]
• ILAFD: Accuracy-Configurable Floating-Point Divider Using an Approximate Reciprocal and an Iterative Logarithmic MultiplierJames Oelund, Sunwoong Kim. 639-644 [doi]
• Design of Energy Efficient Posit MultiplierAditya Anirudh Jonnalagadda, Anil Kumar Uppugunduru, Sreehari Veeramachaneni, Syed Ershad Ahmed. 645-651 [doi]
• Ethics in Computing Education: Challenges and Experience with Embedded EthicsSudeep Pasricha. 653-658 [doi]
• IMAC-Sim: : A Circuit-level Simulator For In-Memory Analog Computing ArchitecturesMd Hasibul Amin, Mohammed E. Elbtity, Ramtin Zand. 659-664 [doi]
• Scalable Time-Domain Compute-in-Memory BNN Engine with 2.06 POPS/W Energy Efficiency for Edge-AI DevicesJie Lou, Florian Freye, Christian Lanius, Tobias Gemmeke. 665-670 [doi]
• CoOAx: Correlation-aware Synthesis of FPGA-based Approximate OperatorsSalim Ullah, Siva Satyendra Sahoo, Akash Kumar 0001. 671-677 [doi]
• A Machine Learning Based Load Value Approximator Guided by the Tightened Value LocalityAlain Aoun, Mahmoud Masadeh, Sofiène Tahar. 679-684 [doi]
• Metrics-to-Methods: Decisive Reverse Engineering Metrics for Resilient Logic LockingMohammad Sazadur Rahman, Kimia Zamiri Azar, Farimah Farahmandi, Hadi Mardani Kamali. 685-690 [doi]
• Machine Learning for Intrusion Detection: Stream Classification Guided by Clustering for Sustainable Security in IoTMartin Manuel Lopez, Sicong Shao, Salim Hariri, Soheil Salehi. 691-696 [doi]
• System and Design Technology Co-optimization of Chiplet-based AI Accelerator with Machine LearningKaniz Mishty, Mehdi Sadi. 697-702 [doi]
• Aging-Induced Failure Prognosis via Digital SensorsMd Toufiq Hasan Anik, Hasin Ishraq Reefat, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi. 703-708 [doi]