An accurate novel gate-sizing metric to optimize circuit performance under local intra-die process variations

Zahira Perez, Hector Villacorta, Víctor H. Champac. An accurate novel gate-sizing metric to optimize circuit performance under local intra-die process variations. In IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8-10, 2018. pages 77-82, IEEE, 2018. [doi]

Authors

Zahira Perez

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Hector Villacorta

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Víctor H. Champac

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