Zahira Perez, Hector Villacorta, Víctor H. Champac. An accurate novel gate-sizing metric to optimize circuit performance under local intra-die process variations. In IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8-10, 2018. pages 77-82, IEEE, 2018. [doi]
@inproceedings{PerezVC18,
title = {An accurate novel gate-sizing metric to optimize circuit performance under local intra-die process variations},
author = {Zahira Perez and Hector Villacorta and Víctor H. Champac},
year = {2018},
doi = {10.1109/VLSI-SoC.2018.8644864},
url = {https://doi.org/10.1109/VLSI-SoC.2018.8644864},
researchr = {https://researchr.org/publication/PerezVC18},
cites = {0},
citedby = {0},
pages = {77-82},
booktitle = {IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8-10, 2018},
publisher = {IEEE},
isbn = {978-1-5386-4756-1},
}