Zbigniew Piatek, Jerzy F. Kolodziejski, Witold A. Pleskacz. ESD Failures of Integrated Circuits and Their Diagnostics Using Transmission Line Pulsing. In Patrick Girard, Andrzej Krasniewski, Elena Gramatová, Adam Pawlak, Tomasz Garbolino, editors, Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), Kraków, Poland, April 11-13, 2007. pages 423-428, IEEE Computer Society, 2007.
Abstract is missing.