Identifying Tests for Logic Fault Models Involving Subsets of Lines without Fault Enumeration - researchr publication

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Irith Pomeranz, Sudhakar M. Reddy. Identifying Tests for Logic Fault Models Involving Subsets of Lines without Fault Enumeration. In VLSI Design 2010: 23rd International Conference on VLSI Design, 9th International Conference on Embedded Systems, Bangalore, India, 3-7 January 2010. pages 39-44, IEEE, 2010. [doi]

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