TEMPLATES: A Test Generation Procedure for Synchronous Sequential Circuits

Irith Pomeranz, Sudhakar M. Reddy. TEMPLATES: A Test Generation Procedure for Synchronous Sequential Circuits. In 6th Asian Test Symposium (ATS 97), 17-18 November 1997, Akita, Japan. pages 74, IEEE Computer Society, 1997. [doi]

@inproceedings{PomeranzR97a,
  title = {TEMPLATES: A Test Generation Procedure for Synchronous Sequential Circuits},
  author = {Irith Pomeranz and Sudhakar M. Reddy},
  year = {1997},
  url = {http://csdl.computer.org/comp/proceedings/ats/1997/8209/00/82090074abs.htm},
  tags = {testing},
  researchr = {https://researchr.org/publication/PomeranzR97a},
  cites = {0},
  citedby = {0},
  pages = {74},
  booktitle = {6th Asian Test Symposium (ATS  97), 17-18 November 1997, Akita, Japan},
  publisher = {IEEE Computer Society},
  isbn = {0-8186-8209-4},
}