Operation-aware assist circuit design for improved write performance of FinFET based SRAM

Ekta Prajapati, Nandakishor Yadav, Manisha Pattanaik, G. K. Sharma. Operation-aware assist circuit design for improved write performance of FinFET based SRAM. In 18th International Symposium on VLSI Design and Test, VDAT 2014, Coimbatore, India, July 16-18, 2014. pages 1-6, IEEE, 2014. [doi]

Abstract

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