On-chip inductance modeling and RLC extraction of VLSI interconnects for circuit simulation - researchr publication authors

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Xiaoning Qi, Gaofeng Wang, Zhiping Yu, Robert W. Dutton, Tak Young, Norman Chang. On-chip inductance modeling and RLC extraction of VLSI interconnects for circuit simulation. In Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, CICC 2000, Orlando, FL, USA, May 21-24, 2000. pages 487-490, IEEE, 2000. [doi]

This author has not been identified. Look up 'Xiaoning Qi' in GoogleThis author has not been identified. Look up 'Gaofeng Wang' in GoogleThis author has not been identified. Look up 'Zhiping Yu' in GoogleThis author has not been identified. Look up 'Robert W. Dutton' in GoogleThis author has not been identified. Look up 'Tak Young' in GoogleThis author has not been identified. Look up 'Norman Chang' in Google

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