Xiaoning Qi, Gaofeng Wang, Zhiping Yu, Robert W. Dutton, Tak Young, Norman Chang. On-chip inductance modeling and RLC extraction of VLSI interconnects for circuit simulation. In Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, CICC 2000, Orlando, FL, USA, May 21-24, 2000. pages 487-490, IEEE, 2000. [doi]
@inproceedings{QiWYDYC00,
title = {On-chip inductance modeling and RLC extraction of VLSI interconnects for circuit simulation},
author = {Xiaoning Qi and Gaofeng Wang and Zhiping Yu and Robert W. Dutton and Tak Young and Norman Chang},
year = {2000},
doi = {10.1109/CICC.2000.852714},
url = {https://doi.org/10.1109/CICC.2000.852714},
researchr = {https://researchr.org/publication/QiWYDYC00},
cites = {0},
citedby = {0},
pages = {487-490},
booktitle = {Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, CICC 2000, Orlando, FL, USA, May 21-24, 2000},
publisher = {IEEE},
isbn = {0-7803-5809-0},
}