M. Rahimi, M. B. Ghaznavi-Ghoushchi. A low-power and high-speed parallel binary comparator based on inter-stage modified binary tree structure and power-delay improved cell elements. Microelectronics Journal, 88:37-46, 2019. [doi]
@article{RahimiG19,
title = {A low-power and high-speed parallel binary comparator based on inter-stage modified binary tree structure and power-delay improved cell elements},
author = {M. Rahimi and M. B. Ghaznavi-Ghoushchi},
year = {2019},
doi = {10.1016/j.mejo.2019.04.009},
url = {https://doi.org/10.1016/j.mejo.2019.04.009},
researchr = {https://researchr.org/publication/RahimiG19},
cites = {0},
citedby = {0},
journal = {Microelectronics Journal},
volume = {88},
pages = {37-46},
}