A retargetable VLIW compiler framework for DSPs withinstruction-level parallelism

Subramanian Rajagopalan, Sreeranga P. Rajan, Sharad Malik, Sandro Rigo, Guido Araujo, Koichiro Takayama. A retargetable VLIW compiler framework for DSPs withinstruction-level parallelism. IEEE Trans. on CAD of Integrated Circuits and Systems, 20(11):1319-1328, 2001. [doi]

@article{RajagopalanRMRAT01,
  title = {A retargetable VLIW compiler framework for DSPs withinstruction-level parallelism},
  author = {Subramanian Rajagopalan and Sreeranga P. Rajan and Sharad Malik and Sandro Rigo and Guido Araujo and Koichiro Takayama},
  year = {2001},
  doi = {10.1109/43.959861},
  url = {http://doi.ieeecomputersociety.org/10.1109/43.959861},
  tags = {compiler},
  researchr = {https://researchr.org/publication/RajagopalanRMRAT01},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {20},
  number = {11},
  pages = {1319-1328},
}