Reconfigurable Viterbi decoder on mesh connected multiprocessor architecture

Ritesh Rajore, Ganesh Garga, H. S. Jamadagni, S. K. Nandy. Reconfigurable Viterbi decoder on mesh connected multiprocessor architecture. In 19th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2008, July 2-4, 2008 Leuven, Belgium. pages 49-54, IEEE Computer Society, 2008. [doi]

Authors

Ritesh Rajore

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Ganesh Garga

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H. S. Jamadagni

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S. K. Nandy

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