A methodology to reuse random IP stimuli in an SoC functional verification environment - researchr publication

researchr

You are not signed in
Sign in
Sign up

V. S. Rashmi, Giridhar Somayaji, Sirisha Bhamidipathi. A methodology to reuse random IP stimuli in an SoC functional verification environment. In 19th International Symposium on VLSI Design and Test, VDAT 2015, Ahmedabad, India, June 26-29, 2015. pages 1-5, IEEE, 2015. [doi]

Abstract is missing.

runs on WebDSL