Fast test generation for circuits with RTL and gate-level views

Srivaths Ravi, Niraj K. Jha. Fast test generation for circuits with RTL and gate-level views. In Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October - 1 November 2001. pages 1068-1077, IEEE Computer Society, 2001.

@inproceedings{RaviJ01,
  title = {Fast test generation for circuits with RTL and gate-level views},
  author = {Srivaths Ravi and Niraj K. Jha},
  year = {2001},
  tags = {testing},
  researchr = {https://researchr.org/publication/RaviJ01},
  cites = {0},
  citedby = {0},
  pages = {1068-1077},
  booktitle = {Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October - 1 November 2001},
  publisher = {IEEE Computer Society},
  isbn = {0-7803-7169-0},
}