SAT Based Place-And-Route for High-Speed Designs on 2.5D FPGAs - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Chirag Ravishankar, Henri Fraisse, Dinesh Gaitonde. SAT Based Place-And-Route for High-Speed Designs on 2.5D FPGAs. In International Conference on Field-Programmable Technology, FPT 2018, Naha, Okinawa, Japan, December 10-14, 2018. pages 118-125, IEEE, 2018. [doi]

This author has not been identified. Look up 'Chirag Ravishankar' in GoogleThis author has not been identified. Look up 'Henri Fraisse' in GoogleThis author has not been identified. Look up 'Dinesh Gaitonde' in Google

runs on WebDSL