SAT Based Place-And-Route for High-Speed Designs on 2.5D FPGAs

Chirag Ravishankar, Henri Fraisse, Dinesh Gaitonde. SAT Based Place-And-Route for High-Speed Designs on 2.5D FPGAs. In International Conference on Field-Programmable Technology, FPT 2018, Naha, Okinawa, Japan, December 10-14, 2018. pages 118-125, IEEE, 2018. [doi]

@inproceedings{RavishankarFG18,
  title = {SAT Based Place-And-Route for High-Speed Designs on 2.5D FPGAs},
  author = {Chirag Ravishankar and Henri Fraisse and Dinesh Gaitonde},
  year = {2018},
  doi = {10.1109/FPT.2018.00027},
  url = {https://doi.org/10.1109/FPT.2018.00027},
  researchr = {https://researchr.org/publication/RavishankarFG18},
  cites = {0},
  citedby = {0},
  pages = {118-125},
  booktitle = {International Conference on Field-Programmable Technology, FPT 2018, Naha, Okinawa, Japan, December 10-14, 2018},
  publisher = {IEEE},
  isbn = {978-1-7281-0214-6},
}