Efficient methodology for detection and correction of SEU-based interconnect errors in FPGAs using partial reconfiguration (abstract only)

E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti, Narayanan Vijaykrishnan. Efficient methodology for detection and correction of SEU-based interconnect errors in FPGAs using partial reconfiguration (abstract only). In Herman Schmit, Steven J. E. Wilton, editors, Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, FPGA 2005, Monterey, California, USA, February 20-22, 2005. pages 265, ACM, 2005. [doi]

Abstract

Abstract is missing.