On validating data hold times for flip-flops in sequential circuits

Sudhakar M. Reddy, Irith Pomeranz, Seiji Kajihara, Atsushi Murakami, Sadami Takeoka, Mitsuyasu Ohta. On validating data hold times for flip-flops in sequential circuits. In Proceedings IEEE International Test Conference 2000, Atlantic City, NJ, USA, October 2000. pages 317-325, IEEE Computer Society, 2000.

Abstract

Abstract is missing.