A robust 1.5Gb/s + 3Gb/s serial PHY with feed-forward correction clock and data recovery

William Redman-White, Martin Bugbee, Steve Dobbs, X. Wu, Richard A. H. Balmford, Jonah Nuttgens, Umer Salim Kiani, Richard Clegg, Gerrit W. den Besten. A robust 1.5Gb/s + 3Gb/s serial PHY with feed-forward correction clock and data recovery. In William Redman-White, Anthony J. Walton, editors, ESSCIRC 2008 - 34th European Solid-State Circuits Conference, Edinburgh, Scotland, UK, 15-19 September 2008. pages 170-173, IEEE, 2008. [doi]

Authors

William Redman-White

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Martin Bugbee

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Steve Dobbs

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X. Wu

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Richard A. H. Balmford

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Jonah Nuttgens

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Umer Salim Kiani

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Richard Clegg

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Gerrit W. den Besten

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