Thara Rejimon, Karthikeyan Lingasubramanian, Sanjukta Bhanja. Probabilistic Error Modeling for Nano-Domain Logic Circuits. IEEE Trans. VLSI Syst., 17(1):55-65, 2009. [doi]
@article{RejimonLB09,
title = {Probabilistic Error Modeling for Nano-Domain Logic Circuits},
author = {Thara Rejimon and Karthikeyan Lingasubramanian and Sanjukta Bhanja},
year = {2009},
doi = {10.1109/TVLSI.2008.2003167},
url = {http://dx.doi.org/10.1109/TVLSI.2008.2003167},
tags = {modeling, logic},
researchr = {https://researchr.org/publication/RejimonLB09},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {17},
number = {1},
pages = {55-65},
}