Serial transistor network modeling for bridging fault simulation

Michel Renovell, P. Huc, Yves Bertrand. Serial transistor network modeling for bridging fault simulation. In 4th Asian Test Symposium (ATS 95), November 23-24, 1995. Bangalore, India. pages 100-106, IEEE Computer Society, 1995. [doi]

Authors

Michel Renovell

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P. Huc

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Yves Bertrand

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