Michel Renovell, P. Huc, Yves Bertrand. Serial transistor network modeling for bridging fault simulation. In 4th Asian Test Symposium (ATS 95), November 23-24, 1995. Bangalore, India. pages 100-106, IEEE Computer Society, 1995. [doi]
@inproceedings{RenovellHB95:0,
title = {Serial transistor network modeling for bridging fault simulation},
author = {Michel Renovell and P. Huc and Yves Bertrand},
year = {1995},
url = {http://csdl.computer.org/comp/proceedings/ats/1995/7129/00/71290100abs.htm},
tags = {modeling},
researchr = {https://researchr.org/publication/RenovellHB95%3A0},
cites = {0},
citedby = {0},
pages = {100-106},
booktitle = {4th Asian Test Symposium (ATS 95), November 23-24, 1995. Bangalore, India},
publisher = {IEEE Computer Society},
isbn = {0-8186-7129-7},
}