Low area pipelined circuits by multi-clock cycle paths and clock scheduling

Bakhtiar Affendi Rosdi, Atsushi Takahashi. Low area pipelined circuits by multi-clock cycle paths and clock scheduling. In Fumiyasu Hirose, editor, Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006. pages 260-265, IEEE, 2006. [doi]

Abstract

Abstract is missing.