Polynomial Time Algorithm for Area and Power Efficient Adder Synthesis in High-Performance Designs

Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan. Polynomial Time Algorithm for Area and Power Efficient Adder Synthesis in High-Performance Designs. IEEE Trans. on CAD of Integrated Circuits and Systems, 35(5):820-831, 2016. [doi]

Authors

Subhendu Roy

This author has not been identified. Look up 'Subhendu Roy' in Google

Mihir R. Choudhury

This author has not been identified. Look up 'Mihir R. Choudhury' in Google

Ruchir Puri

This author has not been identified. Look up 'Ruchir Puri' in Google

David Z. Pan

This author has not been identified. Look up 'David Z. Pan' in Google