Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan. Polynomial Time Algorithm for Area and Power Efficient Adder Synthesis in High-Performance Designs. IEEE Trans. on CAD of Integrated Circuits and Systems, 35(5):820-831, 2016. [doi]
@article{RoyCPP16,
title = {Polynomial Time Algorithm for Area and Power Efficient Adder Synthesis in High-Performance Designs},
author = {Subhendu Roy and Mihir R. Choudhury and Ruchir Puri and David Z. Pan},
year = {2016},
doi = {10.1109/TCAD.2015.2481794},
url = {http://dx.doi.org/10.1109/TCAD.2015.2481794},
researchr = {https://researchr.org/publication/RoyCPP16},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {35},
number = {5},
pages = {820-831},
}