Polynomial Time Algorithm for Area and Power Efficient Adder Synthesis in High-Performance Designs

Subhendu Roy, Mihir R. Choudhury, Ruchir Puri, David Z. Pan. Polynomial Time Algorithm for Area and Power Efficient Adder Synthesis in High-Performance Designs. IEEE Trans. on CAD of Integrated Circuits and Systems, 35(5):820-831, 2016. [doi]

Abstract

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