Energy analysis of bipartition architecture for pipelined circuits

Shanq-Jang Ruan, Edwin Naroska, Yen-Jen Chang, Chia-Lin Ho, Feipei Lai. Energy analysis of bipartition architecture for pipelined circuits. In IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002. pages 7-11, IEEE, 2002. [doi]

Authors

Shanq-Jang Ruan

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Edwin Naroska

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Yen-Jen Chang

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Chia-Lin Ho

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Feipei Lai

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