Shanq-Jang Ruan, Edwin Naroska, Yen-Jen Chang, Chia-Lin Ho, Feipei Lai. Energy analysis of bipartition architecture for pipelined circuits. In IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002. pages 7-11, IEEE, 2002. [doi]
@inproceedings{RuanNCHL02,
title = {Energy analysis of bipartition architecture for pipelined circuits},
author = {Shanq-Jang Ruan and Edwin Naroska and Yen-Jen Chang and Chia-Lin Ho and Feipei Lai},
year = {2002},
doi = {10.1109/APCCAS.2002.1115096},
url = {http://dx.doi.org/10.1109/APCCAS.2002.1115096},
tags = {architecture, analysis},
researchr = {https://researchr.org/publication/RuanNCHL02},
cites = {0},
citedby = {0},
pages = {7-11},
booktitle = {IEEE Asia Pacific Conference on Circuits and Systems 2002, APCCAS 2002, Singapore, 16-18 December 2002},
publisher = {IEEE},
}