A Scalable Solution to Soft Error Tolerant Circuit Design Using Partitioning-Based Gate Sizing

M. Amin Sabet, Behnam Ghavami, Mohsen Raji. A Scalable Solution to Soft Error Tolerant Circuit Design Using Partitioning-Based Gate Sizing. IEEE Transactions on Reliability, 66(1):245-256, 2017. [doi]

@article{SabetGR17,
  title = {A Scalable Solution to Soft Error Tolerant Circuit Design Using Partitioning-Based Gate Sizing},
  author = {M. Amin Sabet and Behnam Ghavami and Mohsen Raji},
  year = {2017},
  doi = {10.1109/TR.2016.2645479},
  url = {http://dx.doi.org/10.1109/TR.2016.2645479},
  researchr = {https://researchr.org/publication/SabetGR17},
  cites = {0},
  citedby = {0},
  journal = {IEEE Transactions on Reliability},
  volume = {66},
  number = {1},
  pages = {245-256},
}