A Scalable Solution to Soft Error Tolerant Circuit Design Using Partitioning-Based Gate Sizing

M. Amin Sabet, Behnam Ghavami, Mohsen Raji. A Scalable Solution to Soft Error Tolerant Circuit Design Using Partitioning-Based Gate Sizing. IEEE Transactions on Reliability, 66(1):245-256, 2017. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.