17.2 A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast Locking

Alessio Santiccioli, Mario Mercandelli, Luca Bertulessi, Angelo Parisi, Dmytro Cherniak, Andrea Leonardo Lacaita, Carlo Samori, Salvatore Levantino. 17.2 A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast Locking. In 2020 IEEE International Solid- State Circuits Conference, ISSCC 2020, San Francisco, CA, USA, February 16-20, 2020. pages 268-270, IEEE, 2020. [doi]

Authors

Alessio Santiccioli

This author has not been identified. Look up 'Alessio Santiccioli' in Google

Mario Mercandelli

This author has not been identified. Look up 'Mario Mercandelli' in Google

Luca Bertulessi

This author has not been identified. Look up 'Luca Bertulessi' in Google

Angelo Parisi

This author has not been identified. Look up 'Angelo Parisi' in Google

Dmytro Cherniak

This author has not been identified. Look up 'Dmytro Cherniak' in Google

Andrea Leonardo Lacaita

This author has not been identified. Look up 'Andrea Leonardo Lacaita' in Google

Carlo Samori

This author has not been identified. Look up 'Carlo Samori' in Google

Salvatore Levantino

This author has not been identified. Look up 'Salvatore Levantino' in Google