The following publications are possibly variants of this publication:
- A 66-fs-rms Jitter 12.8-to-15.2-GHz Fractional-N Bang-Bang PLL With Digital Frequency-Error Recovery for Fast LockingAlessio Santiccioli, Mario Mercandelli, Luca Bertulessi, Angelo Parisi, Dmytro Cherniak, Andrea L. Lacaita, Carlo Samori, Salvatore Levantino. jssc, 55(12):3349-3361, 2020. [doi]
- A low-phase-noise digital bang-bang PLL with fast lock over a wide lock rangeLuca Bertulessi, Luigi Grimaldi, Dmytro Cherniak, Carlo Samori, Salvatore Levantino. isscc 2018: 252-254 [doi]
- Novel Feed-Forward Technique for Digital Bang-Bang PLL to Achieve Fast Lock and Low Phase NoiseLuca Bertulessi, Dmytro Cherniak, Mario Mercandelli, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino. tcasI, 69(5):1858-1870, 2022. [doi]
- Bang-bang digital PLLsSalvatore Levantino. esscirc 2016: 329-334 [doi]
- A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μs-Locking-TimeSimone Mattia Dartizio, Francesco Buccoleri, Francesco Tesolin, Luca Avallone, Alessio Santiccioli, Agata Iesurum, Giovanni Steffan, Dmytro Cherniak, Luca Bertulessi, Andrea Bevilacqua, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino. jssc, 57(12):3538-3551, 2022. [doi]