17.2 A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast Locking

Alessio Santiccioli, Mario Mercandelli, Luca Bertulessi, Angelo Parisi, Dmytro Cherniak, Andrea Leonardo Lacaita, Carlo Samori, Salvatore Levantino. 17.2 A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast Locking. In 2020 IEEE International Solid- State Circuits Conference, ISSCC 2020, San Francisco, CA, USA, February 16-20, 2020. pages 268-270, IEEE, 2020. [doi]

@inproceedings{SanticcioliMBPC20,
  title = {17.2 A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast Locking},
  author = {Alessio Santiccioli and Mario Mercandelli and Luca Bertulessi and Angelo Parisi and Dmytro Cherniak and Andrea Leonardo Lacaita and Carlo Samori and Salvatore Levantino},
  year = {2020},
  doi = {10.1109/ISSCC19947.2020.9063094},
  url = {https://doi.org/10.1109/ISSCC19947.2020.9063094},
  researchr = {https://researchr.org/publication/SanticcioliMBPC20},
  cites = {0},
  citedby = {0},
  pages = {268-270},
  booktitle = {2020 IEEE International Solid- State Circuits Conference, ISSCC 2020, San Francisco, CA, USA, February 16-20, 2020},
  publisher = {IEEE},
  isbn = {978-1-7281-3205-1},
}