Pipelined Decision Tree Classification Accelerator Implementation in FPGA (DT-CAIF)

Fareena Saqib, Aindrik Dutta, Jim Plusquellic, Philip Ortiz, Marios S. Pattichis. Pipelined Decision Tree Classification Accelerator Implementation in FPGA (DT-CAIF). IEEE Transactions on Computers, 64(1):280-285, 2015. [doi]

Abstract

Abstract is missing.