Hirotoshi Sato, Hideaki Nagaoka, Hiroaki Honda, Yukio Maki, Tomohisa Wada, Yutaka Arita, Kazuhito Tsutsumi, Makoto Taniguchi, Michihiro Yamada. A 5-MHz, 3.6-mW, 1.4-V SRAM with nonboosted, vertical bipolar bit-line contact memory cell. J. Solid-State Circuits, 33(11):1672-1681, 1998. [doi]
@article{SatoNHMWATTY98,
title = {A 5-MHz, 3.6-mW, 1.4-V SRAM with nonboosted, vertical bipolar bit-line contact memory cell},
author = {Hirotoshi Sato and Hideaki Nagaoka and Hiroaki Honda and Yukio Maki and Tomohisa Wada and Yutaka Arita and Kazuhito Tsutsumi and Makoto Taniguchi and Michihiro Yamada},
year = {1998},
doi = {10.1109/4.726557},
url = {https://doi.org/10.1109/4.726557},
researchr = {https://researchr.org/publication/SatoNHMWATTY98},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {33},
number = {11},
pages = {1672-1681},
}