Josef Schneider, Jorgen Peddersen, Sri Parameswaran. A scorchingly fast FPGA-based Precise L1 LRU cache simulator. In 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014, Singapore, January 20-23, 2014. pages 412-417, IEEE, 2014. [doi]
@inproceedings{SchneiderPP14,
title = {A scorchingly fast FPGA-based Precise L1 LRU cache simulator},
author = {Josef Schneider and Jorgen Peddersen and Sri Parameswaran},
year = {2014},
doi = {10.1109/ASPDAC.2014.6742926},
url = {http://dx.doi.org/10.1109/ASPDAC.2014.6742926},
researchr = {https://researchr.org/publication/SchneiderPP14},
cites = {0},
citedby = {0},
pages = {412-417},
booktitle = {19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014, Singapore, January 20-23, 2014},
publisher = {IEEE},
}