Josef Schneider - researchr alias

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Viewing Publication 1 - 7 from 7

2015

Temperature, energy and performance: addressing embedded system challenges through fast cache simulationJosef Schneider. PhD thesis, University of New South Wales, Sydney, Australia, 2015. [doi]

Speeding up single pass simulation of PLRUt cachesJosef Schneider, Jorgen Peddersen, Sri Parameswaran. aspdac 2015: 695-700 [doi]

2014

Hardware-based fast exploration of cache hierarchies in application specific MPSoCsIsuru Nawinne, Josef Schneider, Haris Javaid, Sri Parameswaran. date 2014: 1-6 [doi]

A scorchingly fast FPGA-based Precise L1 LRU cache simulatorJosef Schneider, Jorgen Peddersen, Sri Parameswaran. aspdac 2014: 412-417 [doi]

MASH{fifo}: A Hardware-Based Multiple Cache Simulator for Rapid FIFO Cache AnalysisJosef Schneider, Jorgen Peddersen, Sri Parameswaran. dac 2014: 1-6 [doi]

2013

Analyzing the thermal hotspots in FPGA-based embedded systemsHussam Amrouch, Thomas Ebi, Josef Schneider, Sridevan Parameswaran, Jörg Henkel. fpl 2013: 1-4 [doi]

An extremely compact JPEG encoder for adaptive embedded systemsJosef Schneider, Sri Parameswaran. date 2013: 1063-1064 [doi]

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