Phase-locked loop simulations using the latency insertion method

José E. Schutt-Ainé, Patrick Goh. Phase-locked loop simulations using the latency insertion method. In 4th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2013, Cusco, Peru, February 27 - March 1, 2013. pages 1-4, IEEE, 2013. [doi]

@inproceedings{Schutt-AineG13,
  title = {Phase-locked loop simulations using the latency insertion method},
  author = {José E. Schutt-Ainé and Patrick Goh},
  year = {2013},
  doi = {10.1109/LASCAS.2013.6519090},
  url = {https://doi.org/10.1109/LASCAS.2013.6519090},
  researchr = {https://researchr.org/publication/Schutt-AineG13},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {4th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2013, Cusco, Peru, February 27 - March 1, 2013},
  publisher = {IEEE},
  isbn = {978-1-4673-4897-3},
}