Phase-locked loop simulations using the latency insertion method

José E. Schutt-Ainé, Patrick Goh. Phase-locked loop simulations using the latency insertion method. In 4th IEEE Latin American Symposium on Circuits and Systems, LASCAS 2013, Cusco, Peru, February 27 - March 1, 2013. pages 1-4, IEEE, 2013. [doi]

Abstract

Abstract is missing.