A Hierarchical, Desgin-for-Testability (DFT) Methodology for the Rapid Prototyping of Application-Specific Signal Processors (RASSP)

Richard M. Sedmak, John Evans. A Hierarchical, Desgin-for-Testability (DFT) Methodology for the Rapid Prototyping of Application-Specific Signal Processors (RASSP). In Proceedings IEEE International Test Conference 1995, Driving Down the Cost of Test, Washington, DC, USA, October 21-25, 1995. pages 319-327, IEEE Computer Society, 1995.

@inproceedings{SedmakE95,
  title = {A Hierarchical, Desgin-for-Testability (DFT) Methodology for the Rapid Prototyping of Application-Specific Signal Processors (RASSP)},
  author = {Richard M. Sedmak and John Evans},
  year = {1995},
  tags = {testing},
  researchr = {https://researchr.org/publication/SedmakE95},
  cites = {0},
  citedby = {0},
  pages = {319-327},
  booktitle = {Proceedings IEEE International Test Conference 1995, Driving Down the Cost of Test, Washington, DC, USA, October 21-25, 1995},
  publisher = {IEEE Computer Society},
  isbn = {0-7803-2992-9},
}