Lukás Sekanina. Design and Analysis of a New Self-Testing Adder which Utilizes Polymorphic Gates. In Patrick Girard, Andrzej Krasniewski, Elena Gramatová, Adam Pawlak, Tomasz Garbolino, editors, Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), Kraków, Poland, April 11-13, 2007. pages 243-246, IEEE Computer Society, 2007.
Abstract is missing.