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Off-chip test architecture for improving multi-site testing efficiency using tri-state decoder and 3V-level encoder

Sungyoul Seo, Hyeonchan Lim, Soyeon Kang, Sungho Kang. Off-chip test architecture for improving multi-site testing efficiency using tri-state decoder and 3V-level encoder. In 18th International Symposium on Quality Electronic Design, ISQED 2017, Santa Clara, CA, USA, March 14-15, 2017. pages 191-195, IEEE, 2017. [doi]

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